Role Overview
The engineer drives innovation in test methodologies to ensure first-pass silicon success, high test coverage, and product reliability across global, multi-site teams. They support post-silicon bring-up, debug complex designs, and contribute to next-generation test IP and silicon health monitoring technologies. The role also demands mentoring and customer-facing support to deliver scalable, high-quality solutions.
Company : Synopsys
Role : Senior Staff DFT Engineer
Experience : Professional Experienced
Qualification : Batchelor Degree
Location : Bangalore
Key Responsibilities
- Lead execution of DFT flows including scan chain insertion, MBIST, and test compression.
- Analyze and optimize RTL for DFT readiness and collaborate with design teams on impact assessments.
- Develop and validate silicon lifecycle management (SLM) solutions internally and with customers.
- Automate DFT processes and provide post-silicon bring-up support.
- Capture customer requirements and ensure smooth deployment and adoption of test solutions.
- Document methodologies and support quality audits.
- Provide technical guidance, troubleshoot issues, and conduct internal training.
- Drive innovation and continuous improvement in DFT tools and flows.
Skills and Requirements
- Bachelor’s or Master’s in Electrical/Computer Engineering or related.
- 8-10+ years of hands-on DFT experience with SoC/ASIC, including scan, ATPG, MBIST, and JTAG standards (IEEE 1149.1, 1687/1500).
- Strong RTL codes skills (Verilog/SystemVerilog/VHDL) and scripting proficiency (TCL, Python).
- Familiarity with flow automation, synthesis constraints (SDC), Lint, timing verification, and CDC tools.
- Strong debugging and customer interaction skills.
- Proactive, analytical mindset with excellent communication and teamwork abilities.
